Quantum computing has the potential to surpass classical computing in solving some problems, including database search, large number prime factorization, and other issues that are widely used in social life. In order to run a quantum algorithm on a specific quantum computing device, it is necessary to decompose the quantum algorithm into a sequence of basic quantum logic operations natively supported by the hardware.

There are many options in this compilation process. Although all roads lead to Rome, the final performance varies greatly. The optimized quantum compilation strategy can obtain a shorter sequence of physical operations, so that qubits can operate within a limited lifetime and perform more tasks. Therefore, optimizing quantum compilation is as important as improving the hardware performance, which is of great significance for the realization of near-term applications.

Chair Professor Dapeng Yu and Associate Researcher Fei Yan of the Shenzhen Institute for Quantum Science and Engineering (SIQSE) at the Southern University of Science and Technology (SUSTech) have recently collaborated with Professor Xiaoming Sun’s research team from the Institute of Computing Technology of the Chinese Academy of Sciences (ICT) to make new progress in the field of quantum algorithm implementation and quantum architecture.

The research team proposed and experimentally realized an easily scalable quantum version of logic AND gates, which significantly reduced the hardware cost of implementing AND logic in quantum systems. It has laid the foundation for the realization of a series of key quantum algorithms.

Their research results were published in Nature Physics, entitled “Scalable algorithm simplification using quantum AND logic”.

Figure 1. (a) Decomposition and truth table of the QuAND gate and its reversal. (b) Circuit decomposition of an n-qubit controlled-Z (CZ) gate on a 1D qubit chain.

In this work, the research team proposed the concept of a quantum version of AND gate (Quantum AND, referred to as QuAND). The classical AND gate is an irreversible operation, while the quantum operation must be reversible. In order to break through this limitation, the QuAND gate uses the auxiliary energy level of the qubit to expand the information encoding space, thus obtaining the effect of the AND gate while maintaining the reversibility.

QuAND gates enrich the toolbox of quantum basic instruction sets, which can greatly reduce the cost of decomposing large-scale quantum circuits, such as multi-qubit Toffoli gates, quantum arithmetic circuits, and many other quantum algorithms.

Figure 2. The superconducting quantum chip with 8-qubits.

The research team developed an 8-qubit superconducting quantum processor. The processor used a scalable architecture with tunable couplers and fixed-frequency qubits, and used shared control lines to simplify wiring. In the experiments, a high-fidelity QuAND gate was achieved by applying a parametric drive to the coupler.

Figure 3. (a) Sequence compilation for implementing the 4-qubit (left), 6-qubit (center), and 8-qubit (right) CZ gate. (b) Measured truth tables of the corresponding generalized Toffoli gates.

To construct multi-qubit Toffoli gates, conventional methods require several two-qubit gates that are squared or cubic in the number of qubits. Based on the QuAND logic, the cost of two-qubit gates scales linearly with the qubit number. Because of the significant reduction in gate overhead, the experimental team successfully constructed multi-qubit Toffoli gates, up to 8 qubits (the previous record was 4 qubits), using shallow circuits. Furthermore, they demonstrated the Grover’s search algorithm in a search space of up to 64 entries, much larger than previous results.

Figure 4. Demonstration of Grover’s search algorithm.

This work shows how to construct non-traditional quantum logic gates on a scalable quantum computing hardware, thereby optimizing the compilation scheme for quantum algorithms, and illustrates the importance of tapping the control potential of quantum hardware and enriching the logic gate collection. It lays the foundation for future applications of larger-scale and meaningful quantum algorithms.

Ji Chu, a doctoral student at SUSTech, and Xiaoyu He, a doctoral student at ICT, are the co-first authors of this paper. Prof. Dapeng Yu and Assoc. Researcher Fei Yan of SIQSE and Prof. Xiaoming Sun of ICT are the corresponding authors.

The research work was supported by the National Natural Science Foundation of China (NSFC), Strategic Priority Research Program of the Chinese Academy of Sciences, Department of Science and Technology of Guangdong Province, Science, Technology and Innovation Commission of Shenzhen Municipality, and SUSTech.

Paper link: https://doi.org/10.1038/s41567-022-01813-7